/* ------------------------------------------------------------------------*
 *
 * ------------------------------------------------------------------------*/
#define _GD25Q_HAL_MODEL_
 
#include "gd25q_hal.h"
#include "gd25q_cmd.h"



/*****************************************************************************//*!
* @brief   Dma for spi tx handle.
*               
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/  
void DMA1_Channel4_IRQHandler(){

}
/*
void DMA1_Channel2_IRQHandler()
{
	DMA_Enable(DMA1_CHANNEL3, DISABLE);	
	DMA_Enable(DMA1_CHANNEL2, DISABLE);	 
	
	GDSPI->CTLR2 &= ~ (SPI_CTLR2_DMARE | SPI_CTLR2_DMATE);
	
	gd25qDmaEndSt = DMA1->IFR &(DMA_IFR_TCIF2 | DMA_IFR_TCIF3 | DMA_IFR_ERRIF2 | DMA_IFR_ERRIF3);
	
	DMA1->ICR = DMA_ICR_GIC3 | DMA_ICR_TCIC3 | DMA_ICR_HTIC3 | DMA_ICR_ERRIC3;              
	DMA1->ICR = DMA_ICR_GIC2 | DMA_ICR_TCIC2 | DMA_ICR_HTIC2 | DMA_ICR_ERRIC2;
	
	//add code to tell os that data rw finished ----------------------------------------------
	
	//----------------------------------------------------------------------------------------
}
*/
/*****************************************************************************//*!
* @brief   hal init.
*               
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/    
void gdSpiInit()
{
    spi_parameter_struct SpiPar;
    // Enable USART APB clock 
    rcu_periph_clock_enable(RCU_SPI3);
    rcu_periph_reset_enable(RCU_SPI3RST);
    rcu_periph_reset_disable(RCU_SPI3RST);  

    // Configure USART Rx/Tx as alternate function push-pull 
    gpio_af_set(GPIOE, GPIO_AF_5,GPIO_PIN_2 | GPIO_PIN_5 | GPIO_PIN_6);
    gpio_mode_set(GPIOE, GPIO_MODE_AF, GPIO_PUPD_PULLUP, GPIO_PIN_2 | GPIO_PIN_5 | GPIO_PIN_6);
    gpio_output_options_set(GPIOE, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_2 | GPIO_PIN_5 | GPIO_PIN_6);

    GD25Cs(1);
    //GD25Hold(1);
    //GD25WpDis();

    //config spi
    SpiPar.device_mode = SPI_MASTER;
    SpiPar.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
    SpiPar.frame_size = SPI_FRAMESIZE_8BIT;
    SpiPar.nss = SPI_NSS_SOFT;
    SpiPar.endian = SPI_ENDIAN_MSB;
    SpiPar.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
    SpiPar.prescale =SPI_PSC_256;
    
    spi_init(GDSPI, &SpiPar);
    spi_enable(GDSPI);
    
    NVIC_SetPriority(SPI3_IRQn, 0xFF);
    NVIC_ClearPendingIRQ(SPI3_IRQn);
    NVIC_DisableIRQ(SPI3_IRQn);
}

/*****************************************************************************//*!
* @brief   DMA control.
*               
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/ 
void gdSpiDmaRw(uint8_t ModeRW, uint32_t  Len, uint8_t *Data)
{
  
}

/*****************************************************************************//*!
* @brief   spi data read and write.
*               
* @param   none
*
* @return  none
*
* @ Pass/ Fail criteria: none
*****************************************************************************/ 
uint8_t dgSpiRw(uint8_t dataW)
{
    volatile uint32_t St;
    
    uint8_t dataR;
    St = 0xFFFFFFFF;
    while( St & SPI_STAT_TRANS){St = SPI_STAT(GDSPI);}             //wait tx idle
        
    if(SPI_STAT(GDSPI) & SPI_STAT_RBNE)
        dataR = SPI_DATA(GDSPI);
    
    SPI_DATA(GDSPI) = dataW;
    St = 0xFFFFFFFF;
    while(St & SPI_STAT_TRANS){St = SPI_STAT(GDSPI);}            //wait tx idle
    dataR = SPI_DATA(GDSPI);
    return ( dataR );
}
